About Celestial AI

As the industry strives to meet the demands of the AI workloads, bottlenecks in data transfers between processors and memory have hindered progress. The Photonic Fabric based Memory Fabric provides an optically scalable solution to the ‘Memory Wall’ problem, enabling tens of Terabytes of memory capacity at full HBM bandwidths with low tens of nanoseconds of latency and extremely low power. The Photonic Fabric based Compute Fabric enables Terabyte class bandwidth between compute nodes at low latency and power. Photonic Fabric delivers a transformative leap in AI system performance, ten years more advanced than existing technologies.

Description

Will lead chip development efforts which include design, verification, validation, and physical design of complex chipset. S/he will manage a team of logic designers, verification, validation, and implementation engineers. In addition, you will plan, track, and facilitate execution of ASIC projects from concept to volume production.  You will provide technical guidance and ensure timely completion of projects and achieve high quality bug free silicon.

Responsibilities:

• Scale the ASIC design team with world-class engineers.
• Provide technical leadership and management for the entire SoC development process.
• Drive architecture, design, verification, physical design, silicon bring-up, CAD methodologies.
• Be the point of technical contact for all the third-party IP and design services.
• Drive schedules, priorities, and goals to meet complex business needs and deadlines across geographically distributed teams.
• Be the technical point of contact to cross functional System in Package development and software.
• Provide technical leadership through role modeling, mentoring and teamwork.

Requirements:

• Must have a BS or MS degree in either EE or CS and have a minimum of 12 years of relevant experience in high performance SOC ASIC development from concept to production
• Excellent communication, collaboration, and organizational skills
• Requires hands-on experience with all stages of VLSI development as well as a proven track record of building and leading interdisciplinary and cross-functional teams
• Strong analytical and problem-solving skills
• Highly organized to effectively managing competing priorities
• Demonstrated experience in successfully taping out multiple silicon, experience in FinFET technologies a must.
• Must have a strong understanding of all phases of development in ASIC projects
• Experience in interconnect design and mixed signal is highly desirable

 For California location:

As an early startup experiencing explosive growth, we offer an extremely attractive total compensation package, inclusive of competitive base salary and a generous grant of our valuable early-stage equity.  The target base salary for this role is approximately $200,000.00 - $225,000.00. The base salary offered may be slightly higher or lower than the target base salary, based on the final scope as determined by the depth of the experience and skills demonstrated by candidate in the interviews.

We offer great benefits (health, vision, dental and life insurance), collaborative and continuous learning work environment, where you will get a chance to work with smart and dedicated people engaged in developing the next generation architecture for high performance computing.

Celestial AI Inc. is proud to be an equal opportunity workplace and is an affirmative action employer.

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